GOVLSI



Week 1

  • Theory
    • Unix and Perl
  • Lab
    • Practicing unix and perl - assignment completion

Week 2

  • Theory
    • RC Circuits, Transistor theory, Inverter simulation
  • Lab
    • Continue practicing perl – upto generating xls reports and color coding
    • Familiarizing with the tools: Virtuoso, Spectre and Viva
    • Finding n2p ratio at different corners and voltage
    • Draw basic gates and simulate them
    • RC circuit study, Transistor basics study

Week 3

  • Theory
    • Spice stimulus and measurement writing
    • SRAM bitcell working and sizing
    • SRAM architecture brief overview
    • Pulse shaping logic design [using NAND/NOR]
  • Lab
    • Design different types of basic gates and simulate them, write measurements to find delay and transition time for every input switching combination.

Week 4

  • Theory
    • Clock generator design spec discussion
    • Row and Column Decoder design discussion – including multibank equifill case
  • Lab
    • Design the clock generator and setup stimulus to prove it under different conditions mentioned in the spec.
    • Design different pre decoders needed for memory [in control block]
    • Design WL driver
    • Simulate the decoders designed

Week 5

  • Theory
    • Write driver, column mux, precharge, sense amp
    • Self timing path design
  • Lab
    • Complete IO circuit design and simulate
    • Build the entire memory from the leafcells designed and simulate

Week 6

  • Theory
    • RC modelling
    • Memory Margining – Race/Overlap/Underlap/Pulse Width Margins
  • Lab
    • RC modelling in schematics
    • Write measurements for Race/Overlap/Underlap/Pulse Width Margins

Week 7

  • Theory
    • Sense amp offset analysis
    • Bitcell SNM/ADM/Writability analysis
    • Read and Write Margins
  • Lab
    • Simulation for the above

Week 8

  • Theory
    • Revision and review of margins and Optimizing/Fixing the margin failures – interlocking to fix the races
  • Lab
    • Simulations after optimizing the circuits

Week 9

  • Theory
    • Characterization – Setup/Hold/Access time/Cycletime
  • Lab
    • Measurements writing for the above including bisection

Week 10

  • Theory
    • Revision and review: Characterization – Setup/Hold/Access time/Cycletime
  • Lab
    • Measurements writing for the above including bisection

Week 11

  • Theory
    • Characterization – Pincap, Power, Leakage
  • Lab
    • Measurements writing for the above

Week 12

  • Theory
    • DA and DV
  • Lab
    • Measurements writing for the above

Week 13

  • Theory
    • Designing Write assist techniques
  • Lab
    • Margin measurements writing for the above

Week 14

  • Theory
    • Scan chain and redundancy circuit design
  • Lab
    • Simulations prove the designed logic

Week 15

  • Theory
    • Discussion on multibank memories
  • Lab
    • Simulation – cleaning up the margins and char measurements if any left from previous weeks